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FEATURES Two Independent Linear-in-dB Channels Input Noise at Maximum Gain: 1.8 nV/Hz, 2.7 pA/Hz Bandwidth: 40 MHz (-3 dB) Differential Input Absolute Gain Range Programmable: -14 dB to +34 dB (FBK Shorted to OUT), through 0 dB to +48 dB (FBK Open) Variable Gain Scaling: 20 dB/V through 40 dB/V Stable Gain with Temperature and Supply Variations Single-Ended Unipolar Gain Control Output Common-Mode Independently Set Power Shutdown at Lower End of Gain Control Single +5 V Supply Low Power: 90 mW/Channel Drives A/D Converters Directly APPLICATIONS Ultrasound and Sonar Time-Gain Control High Performance AGC Systems Signal Measurement
Dual, Low Noise, Single-Supply Variable Gain Amplifier AD605
FUNCTIONAL BLOCK DIAGRAM
VGN GAIN CONTROL AND SCALING PRECISION PASSIVE INPUT ATTENUATOR FIXED GAIN AMPLIFIER +34.4dB OUT FBK
VREF
VOCM +IN -IN DIFFERENTIAL ATTENUATOR 0 TO -48.4dB
AD605
PRODUCT DESCRIPTION
The AD605 is a low noise, accurate, dual channel, linear-in-dB variable gain amplifier, which is optimized for any application requiring high performance, wide bandwidth variable gain control. Operating from a single +5 V supply, the AD605 provides differential inputs and unipolar gain control for ease of use. Added flexibility is achieved with a user determined gain range and an external reference input which provides user determined gain scaling (dB/V). The high performance linear-in-dB response of the AD605 is achieved with the differential input, single supply, exponential amplifier (DSX-AMP) architecture. Each of the DSX-AMPs comprise a variable attenuator of 0 dB to -48.4 dB followed by a high speed fixed gain amplifier. The attenuator is based on a 7 stage R-1.5-R ladder network. The attenuation between tap points is 6.908 dB and 48.360 dB for the entire ladder network. The DSX-AMP architecture results in 1.8 nV/Hz input noise spectral density and will accept a 2.0 V input signal when VOCM is biased at VP/2. Each independent channel of the AD605 provides a gain range of 48 dB which can be optimized for the application. Gain
ranges between -14 dB to +34 dB and 0 dB to +48 dB can be selected by a single resistor between pins FBK and OUT. The lower and upper gain range are determined by shorting pin FBK to OUT, or leaving pin FBK unconnected respectively. The two channels of the AD605 can be cascaded to provide 96 dB of very accurate gain range in a monolithic package. The gain control interface provides an input resistance of approximately 2 M and scale factors from 20 dB/V to 30 dB/V for a VREF input voltage of 2.5 V to 1.67 V respectively. Note that scale factors up to 40 dB are achievable with reduced accuracy for scales above 30 dB. The gain scales linearly with control voltages (VGN) of 0.4 V to 2.4 V for the 20 dB/V scale and 0.20 V to 1.20 V for the 40 dB/V scale. When VGN is <50 mV the amplifier is powered-down to draw 1.9 mA. Under normal operation, the quiescent supply current of each amplifier channel is only 18 mA. The AD605 is available in a 16-pin plastic DIP and SOIC, and is guaranteed for operation over the -40C to +85C temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 (c) Analog Devices, Inc., 1996
AD605-SPECIFICATIONS
Model Parameter INPUT CHARACTERISTICS Input Resistance Input Capacitance Peak Input Voltage Input Voltage Noise Input Current Noise Noise Figure Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS -3 dB Bandwidth Slew Rate Output Signal Range Output Impedance Output Short-Circuit Current Harmonic Distortion HD2 HD3 HD2 HD3 Two-Tone Intermodulation Distortion (IMD) 1 dB Compression Point 3rd Order Intercept Channel-to-Channel Crosstalk Conditions
(Each Channel at TA = +25 C, VS = +5 V, RS = 50 , RL = 500 , CL = 5 pF, VREF = 2.5 V (Scaling = 20 dB/V) , -14 dB to +34 dB gain range, unless otherwise noted.)
AD605A Min Typ Max 175 40 3.0 2.5 2 1.8 2.7 8.4 12 -20 40 170 2.5 1.5 2 40 -64 -68 -51 -53 -72 -60 +15 -1 -70 2.0 45 AD605B Min Typ 175 40 3.0 2.5 2 1.8 2.7 8.4 12 -20 40 170 2.5 1.5 2 40 -64 -68 -51 -53 -72 -60 +15 -1 -70 2.0 45 Max Units pF V nV/Hz pA/Hz dB dB dB MHz V/s V mA dBc dBc dBc dBc dBc dBc dBm dBm dB
VGN = 2.9 V VGN = 2.9 V RS = 50 , f = 1 MHz, VGN = 2.9 V RS = 200 , f = 1 MHz, VGN = 2.9 V f = 1 MHz, VGN = 2.65 V Constant with Gain VGN = 1.5 V, Output = 1 V Step RL 500 f = 10 MHz VGN = 1 V, VOUT = 1 V p-p, f = 1 MHz f = 1 MHz f = 10 MHz f = 10 MHz R S = 0 , VGN = 2.9 V, VOUT = 1 V p-p f = 1 MHz f = 10 MHz f = 10 MHz, VGN = 2.9 V, Output Referred f = 10 MHz, VGN = 2.9 V, VOUT = 1 V p-p, Input Referred Ch1: VGN = 2.65 V, Inputs Shorted, Ch2: VGN = 1.5 V (Mid Gain), f = 1 MHz, VOUT = 1 V p-p 1 MHz < f < 10 MHz, Full Gain Range
Group Delay Variation VOCM Input Resistance ACCURACY Absolute Gain Error -14 dB to -11 dB -11 dB to +29 dB +29 dB to +34 dB Gain Scaling Error Output Offset Voltage Output Offset Variation GAIN CONTROL INTERFACE Gain Scaling Factor Gain Range Input Voltage (VGN) Range Input Bias Current Input Resistance Response Time POWER SUPPLY Power Dissipation VREF Input Resistance Quiescent Supply Current Power Down Power-Up Response Time Power-Down Response Time
ns k
0.25 V < VGN < 0.40 V 0.40 V < VGN < 2.40 V 2.40 V < VGN < 2.65 V 0.4 V < VGN < 2.4 V VREF = 2.500 V, VOCM = 2.500 V VREF = 2.500 V, VOCM = 2.500 V VREF = 2.5 V, 0.4 V < VGN < 2.4 V VREF = 1.67 V FBK Short to OUT FBK Open 20 dB/V, VREF = 2.5 V
-1.2 -1.0 -3.5 -50
+1.0 0.3 -1.25 0.25 30 30
+3.0 +1.0 +1.2 50 95
-1.2 +0.75 -1.0 0.2 -3.5 -1.25 0.25 -50 30 30 19
+3.0 +1.0 +1.2 50 50
dB dB dB dB/V mV mV dB/V dB/V dB dB V A M s mW k mA mA s s
19
48 dB Gain Change
20 21 30 -14 - +34 0 - +48 0.1 - 2.9 -0.4 2 0.2 90 10 18 1.9 0.6 0.4
20 21 30 -14 - +34 0 - +48 0.1 - 2.9 -0.4 2 0.2 90 10 18 1.9 0.6 0.4
VPOS VPOS, VGN < 50 mV 48 dB Gain, VOUT = 2 V p-p
23 3.0
23 3.0
-2-
REV. A
AD605
ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE
Supply Voltage +VS Pins 12, 13 (with Pins 4, 5 = 0 V) . . . . . . . . . . . . . . +6.5 V Input Voltages Pins 2, 3, 6, 7 . . . . . . . . . . . . . . . VPOS/2 2 V Continuous Pins 1, 8, 9, 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . VPOS, 0 Internal Power Dissipation Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W Operating Temperature Range . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature, Soldering 60 seconds . . . . . . . . . +300C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2When driven from an external low impedance source.
Model AD605AN AD605AR AD605BN AD605BR
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Option* N-16 R-16A N-16 R-16A
JA
85C/W 100C/W 85C/W 100C/W
*N = Plastic DIP, R = Small Outline IC (SOIC).
PIN CONFIGURATION
GN1 1 -IN1 2 +IN1 3 GND1 4 16 VREF 15 OUT1 14 FBK1
13 VPOS TOP VIEW GND2 5 (Not to Scale) 12 VPOS +IN2 6 -IN2 7 GN2 8 11 FBK2 10 OUT2 9 VOCM
AD605
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD605 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. PIN DESCRIPTIONS 16-Pin Package for Dual Channel AD605
WARNING!
ESD SENSITIVE DEVICE
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Mnemonic VGN1 -IN1 +IN1 GND1 GND2 +IN2 -IN2 VGN2 VOCM OUT2 FBK2 VPOS VPOS FBK1 OUT1 VREF
Description CH1 Gain-Control Input and Power-Down Pin. If grounded, device is off, otherwise positive voltage increases gain. CH1 Negative Input. CH1 Positive Input. Ground. Ground. CH2 Positive Input. CH2 Negative Input. CH2 Gain-Control Input and Power-Down Pin. If grounded, device is off, otherwise positive voltage increases gain. Input to this pin defines common-mode voltage for OUT1 and OUT2. CH2 Output. Feedback Pin that Selects Gain Range of CH2. Positive Supply. Positive Supply. Feedback Pin that Selects Gain Range of CH1. CH1 Output. Input to this pin sets gain-scaling for both channels: 2.5 V = 20 dB/V, 1.67 V = 30 dB/V.
REV. A
-3-
AD605-Typical Performance Characteristics (per Channel)
(VREF = 2.5 V (20 dB/V Scaling), f = 1 MHz, RL = 500 , CL = 5 pF, TA = 25 C, VSS = +5 V)
40 -40C, 25C, 85C 30 50 40 30 20
40 30 30dB/V (VREF = 1.67V)
ACTUAL
ACTUAL
FBK (OPEN) GAIN - dB
20
GAIN - dB
GAIN - dB
20 FBK (SHORT) 10 0
10
10
20dB/V (VREF = 2.50V)
0
0
-10
-10 -20 0.1
-10 -20 0.1
-20 0.1
0.5
0.9
1.3 1.7 2.1 VGN - Volts
2.5
2.9
0.5
0.9
1.3 1.7 2.1 VGN - Volts
2.5
2.9
0.5
0.9
1.3 1.7 VGN - Volts
2.1
2.5
2.9
Figure 1. Gain vs. VGN
Figure 2. Gain vs. VGN for Different Gain Ranges
Figure 3. Gain vs. VGN for Different Gain Scalings
40.0 37.5
GAIN SCALING - dBV
3.0 2.5 2.0 1.5 GAIN ERROR - dB GAIN ERROR - dB 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 85C 25C -40C
2.0 1.5 1.0 f = 1MHz 0.5 0.0 f = 5MHz -0.5 -1.0 -1.5 -2.0 0.2 f = 10MHz
THEORETICAL
35.0 32.5 ACTUAL 30.0 27.5 25.0 22.5 20.0 1.25
-2.5
1.50
1.75 2.00 VREF - Volts
2.25
2.50
-3.0 0.2
0.7
1.2 1.7 VGN -Volts
2.2
2.7
0.7
1.2 1.7 VGN - Volts
2.2
2.7
Figure 4. Gain Scaling vs. VREF
Figure 5. Gain Error vs. VGN at Different Temperatures
Figure 6. Gain Error vs. VGN at Different Frequencies
2.0 1.5 1.0
GAIN ERROR - dB
20 18 16
PERCENTAGE 20dB/V VREF = 2.50V
20
N = 50 G(dB) = G(CH1) - G(CH2)
18 16 14
N = 50 G(dB) = G(CH1) - G(CH2)
14
PERCENTAGE
0.5 0.0 -0.5 -1.0 -1.5 30dB/V VREF = 1.67V
12 10 8 6 4 2
12 10 8 6 4 2 0
-2.0 0.2
0.7
1.2 1.7 VGN - Volts
2.2
2.7
0
-0.8 -0.6 -0.4 -0.2
0.0
0.2
0.4
0.6
0.8
-0.8 -0.6 -0.4 -0.2
0.0
0.2
0.4
0.6
0.8
DELTA GAIN - dB
DELTA GAIN - dB
Figure 7. Gain Error vs. VGN for Different Gain Scalings
Figure 8. Gain Match, VGN1 = VGN2 = 1.0 V
Figure 9. Gain Match, VGN1 = VGN2 = 2.50 V
-4-
REV. A
AD605
60
VGN = 2.9V (FBK = OPEN) VGN = 2.9V (FBK = SHORT)
2.525 2.520
VOCM = 2.50V -40C
130 125 85C 120 25C
40
2.515
VGN = 1.5V (FBK = OPEN)
NOISE - nV/Hz
VOS - Volts
20 GAIN - dB
2.510
VGN = 1.5V (FBK = SHORT) VGN = 0.1V (FBK = OPEN)
2.505 2.500 2.495 2.490 85C
115 110 105 100
25C
0
VGN = 0.1V (FBK = SHORT)
-40C
-20
VGN = 0.0V
-40 -60 100k
2.485 2.480 2.475 95 90 0
1M 10M FREQUENCY - Hz
100M
0
0.5
1.0 1.5 2.0 VGN - Volts
2.5
3.0
0.5
1.0 1.5 2.0 VGN - Volts
2.5
3.0
Figure 10. AC Response
Figure 11. Output Offset vs. VGN
Figure 12. Output Referred Noise vs. VGN
1000
2.00 VGN = 2.9V 1.95 1.90
NOISE - nV/Hz
1.90 VGN = 2.9V 1.85
NOISE - nV/Hz
-20 0 20 40 60 TEMPERATURE - C 80 90
NOISE - nV/Hz
100
1.80
1.85 1.80 1.75 1.70
1.75
10
1.70
1.65 1.65
1 0.1
0.5
0.9
1.3 1.7 VGN - Volts
2.1
2.5
2.9
1.60 -40
1.60 100k
1M FREQUENCY - Hz
10M
Figure 13. Input Referred Noise vs. VGN
Figure 14. Input Referred Noise vs. Temperature
Figure 15. Input Referred Noise vs. Frequency
100 VGN = 2.9V
30 VGN = 2.9V 25
60 RS = 50 50
NOISE FIGURE - dB
10 100 RSOURCE - 1k
NOISE FIGURE - dB
NOISE - nV/Hz
10
40
20
30
15
1
RSOURCE ALONE
20
10
10
0.1 1 10 100 FREQUENCY - 1k
5 1
0 0.1
0.5
0.9
1.3 1.7 2.1 VGN - Volts
2.5
2.9
Figure 16. Input Referred Noise vs. RSOURCE
Figure 17. Noise Figure vs. RSOURCE
Figure 18. Noise Figure vs. VGN
REV. A
-5-
AD605
-30
-35
HARMONIC DISTORTION - dBc
-20 -30 f = 10MHz VO = 1V p-p VGN = 1.0V
HARMONIC DISTORTION - dBc
-35 -40 -45 -50
VO = 1V p-p VGN = 1.0V
-40 -45 -50 HD2 (1MHz) -55 -60 -65 -70 -75 0.5 HD3 (1MHz) 0.8 1.1 1.4 1.7 2.0 VGN - Volts 2.3 2.6 2.9 HD2 (10MHz) HD3 (10MHz)
POUT - dBm
-40 -50 -60 -70 -80 -90 -100 -110 -120 9.92
HD3 -55 HD2 -60 -65 -70 100k
10M 1M FREQUENCY - Hz
100M
9.96 10 10.02 FREQUENCY - MHz
10.04
Figure 19. Harmonic Distortion vs. Frequency
Figure 20. Harmonic Distortion vs. VGN
Figure 21. Intermodulation Distortion
15 10
35 VO = 1V p-p 30 25
INTERCEPT - dBm
2V VO = 2V p-p VGN = 1.5V
5
PIN - dBm
20 f = 10MHz 15 10 5
0 -5
-10 -15 -20 0.1 FREQ = 10MHz FREQ = 1MHz 0.5 0.9 1.3 1.7 2.1 VGN - Volts 2.5 2.9
0 -5 0.6
-2V 253ns 1.253s 100ns / DIV
1
1.4 1.8 2.2 VGN - Volts
2.6
3
Figure 22. 1 dB Compression vs. VGN
Figure 23. 3rd Order Intercept vs. VGN
400mV / DIV
f = 1MHz
Figure 24. Large Signal Pulse Response
200 VO = 200mV p-p VGN = 1.5V
500mV
2.9V
VGN - Volts
100 90
500mV
2.9V
100 90
10
VGN - Volts
40mV / DIV
10
TRIG'D 0.0V
0%
0.1V
0%
500mV
200ns
500mV
100ns
-200 253ns
1.253s 100ns / DIV
Figure 25. Small Signal Pulse Response
Figure 26. Power-Up/Down Response
Figure 27. Gain Response
-6-
REV. A
AD605
-30 VGN1 = 1V VOUT1 = 1V p-p VIN2 = GND 0 VIN = 0dBm -10
180 VGN = 2.9V 175 INPUT IMPEDANCE -
VGN = 2.9V
-40
170 165 160 155 150 145 140 100k
CROSSTALK - dB
-50
-20
CMRR - dB
VGN2 = 2.9V -60 VGN2 = 2.5V
VGN = 2.5V -30 VGN = 2.0V VGN = 0.1V -50
-70 VGN2 = 2.0V VGN2 = 0.1V 1M 10M FREQUENCY - Hz 100M
-40
-80
-90 100k
-60 100k
10M 1M FREQUENCY - Hz
100M
10M 1M FREQUENCY - Hz
100M
Figure 28. Crosstalk (CH1 to CH2) vs. Frequency
Figure 29. Common-Mode Rejection vs. Frequency
Figure 30. Input Impedance vs. Frequency
25 +IS (AD605) SUPPLY CURRENT - mA 20
16
14
12
15
DELAY - ns
10
10
8
VGN = 0.1V
5 +IS (VGN = 0) 0 -40
6 VGN = 2.9V
-20
0 20 40 60 TEMPERATURE - C
80 90
4 100k
1M 10M FREQUENCY - Hz
100M
Figure 31. Supply Current (One Channel) vs. Temperature
Figure 32. Group Delay vs. Frequency
REV. A
-7-
AD605
VREF VGN C1 +IN EXT. C2 -IN VPOS R3 200k VOCM C3 EXT. R4 200k 175 G2 R2 20 R1 820 FBK 3.36k DIFFERENTIAL ATTENUATOR G1 Ao OUT 175 GAIN CONTROL DISTRIBUTED GM
Figure 33. Simplified Block Diagram of a Single Channel of the AD605
THEORY OF OPERATION
The AD605 is a dual channel, low noise variable gain amplifier. Figure 33 shows the simplified block diagram of one channel. Each channel consists of a single-supply X-AMP (hereafter called DSX, Differential Single-supply X-AMP) made up of: (a) a precision passive attenuator (differential ladder) (b) a gain control block (c) a VOCM buffer with supply splitting resistors R3 and R4 (d) an Active Feedback Amplifier1 (AFA) with gain setting resistors R1 and R2. The linear-in-dB gain response of the AD605 can generally be described by equation 1: G (dB) = (Gain Scaling (dB/V)) x (Gain Control (V)) - (19 dB - (14 dB) x (FB)) where FB = 0 if FBK-to-OUT are shorted, FB = 1 if FBK-to-OUT is open. Each channel provides between -14 dB to +34.4 dB through 0 dB to +48.4 dB of gain depending on the value of the resistance connected between pin FBK and OUT. The center 40 dB of gain is exactly linear-in-dB while the gain error increases at the top and bottom of the range. The gain is set by the gain control voltage (VGN). The VREF input establishes the gain scaling--the useful gain scaling range is between 20 dB/V and 40 dB/V for a VREF voltage of 2.5 V and 1.25 V respectively. For example, if FBK to OUT were shorted and VREF were set to 2.50 V (to establish a gain scaling of 20 dB/V), the gain equation would simplify to: G (dB) = (20 (dB/V )) x (VGN (V )) - 19 dB (2) The desired gain can then be achieved by setting the unipolar gain control (VGN) to a voltage within its nominal operating range of 0.25 V to 2.65 V (for 20 dB/V gain scaling). The gain is monotonic for a complete gain control range of 0.1 V to 2.9 V. Maximum gain can be achieved at a VGN of 2.9 V. Since the two channels are identical, only Channel 1 will be used to describe their operation. VREF and VOCM are the only inputs that are shared by the two channels, and since they are normally ac grounds, crosstalk between the two channels is minimized. For highest gain scaling accuracy, VREF should have an external low impedance voltage source. For low accuracy 20 dB/V applications, the VREF input can be decoupled with a capacitor to ground. In this mode the gain scaling will be
1
determined by the midpoint between +VCC and GND, so care should be taken to control the supply voltage to +5 V. The input resistance looking into the VREF pin is 10 k 20%. The AD605 is a single-supply circuit and the VOCM pin is used to establish the dc level of the midpoint of this portion of the circuit. VOCM needs only an external decoupling capacitor to ground to center the midpoint between the supply voltages (+5 V, GND); however if the dc level of the output is important to the user (see APPLICATIONS section for AD9050 example), then VOCM can be specifically set. The input resistance looking into the VOCM pin is 45 k 20%.
Differential Ladder (Attenuator)
(1)
The attenuator before the fixed gain amplifier is realized by a differential seven-stage R-1.5R resistive ladder network with an untrimmed input resistance of 175 single-ended or 350 differentially. The signal applied at the input of the ladder network (Figure 34) is attenuated by 6.908 dB per tap; thus, the attenuation at the first tap is 6.908 dB, at the second, 13.816 dB, and so on all the way to the last tap where the attenuation is 48.356 dB. A unique circuit technique is used to interpolate continuously between the tap points, thereby providing continuous attenuation from 0 dB to -48.36 dB. One can think of the ladder network together with the interpolation mechanism as a voltage-controlled potentiometer. Since the DSX is a single-supply circuit, some means of biasing its inputs must be provided. Node MID together with the VOCM buffer performs this function. Without internal biasing, external biasing would be required. If not done carefully, the biasing network can introduce additional noise and offsets. By providing internal biasing, the user is relieved of this task and only needs to ac couple the signal into the DSX. It should be made clear again that the input to the DSX is still fully differential if driven differentially, i.e., pins +IN and -IN see the same signal but with opposite polarity. What changes is the load as seen by the driver; it is 175 when each input is driven singleended, but 350 when driven differentially. This can be easily explained when thinking of the ladder network as just two 175 resistors connected back-to-back with the middle node, MID, being biased by the VOCM buffer. A differential signal applied between nodes +IN and -IN will result in zero current into node MID, but a single-ended signal applied to either input +IN or -IN while the other input is ac grounded will cause the current delivered by the source to flow into the VOCM buffer via node MID.
To understand the active-feedback amplifier topology, refer to the AD830 data sheet. The AD830 is a practical implementation of the idea.
-8-
REV. A
AD605
R +IN 1.5R MID 1.5R R -IN NOTE: R = 96 1.5R = 144 R 1.5R R 1.5R R 1.5R R 1.5R R 1.5R R 1.5R 175 1.5R -6.908dB R -13.82dB R -20.72dB 1.5R R -27.63dB 1.5R R -34.54dB 1.5R R -41.45dB 1.5R R -48.36dB 1.5R 175
Figure 34. R-1.5R Dual Ladder Network
One feature of the X-AMP architecture is that the output referred noise is constant versus gain over most of the gain range. This can be easily explained by looking at Figure 34 and observing that the tap resistance is equal for all taps after only a few taps away from the inputs. The resistance seen looking into each tap is 54.4 which makes 0.95 nV/Hz of Johnson noise spectral density. Since there are two attenuators, the overall noise contribution of the ladder network is 2 times 0.95 nV/ Hz or 1.34 nV/Hz, a large fraction of the total DSX noise. The rest of the DSX circuit components contribute another 1.20 nV/Hz which together with the attenuator produces 1.8 nV/Hz of total DSX input referred noise.
AC Coupling
From these equations one can see that all gain curves intercept at the same -19 dB point; this intercept will be 14 dB higher (-5 dB) if the FBK to OUT connection is left open. Outside of the central linear range, the gain starts to deviate from the ideal control law but still provides another 8.4 dB of range. For a given gain scaling one can calculate VREF as shown in Equation (6).
V REF = 2.500V x 20 dB /V Gain Scale
30dB/V 20dB/V
(6)
40dB/V 35 30 25 20 15
As already mentioned, the DSX is a single single-supply circuit and therefore its inputs need to be ac coupled to accommodate ground-based signals. External capacitors C1 and C2 in Figure 33 level shift the input signal from ground to the dc value established by VOCM (nominal 2.5 V). C1 and C2, together with the 175 looking into each of DSX inputs (+IN and -IN), will act as high-pass filters with corner frequencies depending on the values chosen for C1 and C2. For example, if C1 and C2 are 0.1 F, then together with the 175 input resistance seen into each side of the differential ladder of the DSX, a -3 dB high-pass corner at 9.1 kHz is formed. If the DSX output needs to be ground referenced, then another ac coupling capacitor will be required for level shifting. This capacitor will also eliminate any dc offsets contributed by the DSX. With a nominal load of 500 and a 0.1 F coupling capacitor, this adds a high-pass filter with -3 dB corner frequency at about 3.2 kHz. The choice for all 3 of these coupling capacitors depends on the application. They should allow the signals of interest to pass unattenuated, while at the same time they can be used to limit the low frequency noise in the system.
Gain Control Interface
GAIN - dB
LINEAR-IN-dB RANGE OF AD605
10 5 0 0.5 -5 1.0 1.5 2.0 2.5 3.0 GAIN CONTROL VOLTAGE
-10 -15 -20
Figure 35. Ideal Gain Curves vs. VREF
The gain-control interface provides an input resistance of approximately 2 M at pin VGN1 and gain scaling factors from 20 dB/V to 40 dB/V for VREF input voltages of 2.5 V to 1.25 V respectively. The gain varies linearly-in-dB for the center 40 dB of gain range, that is for VGN equal to 0.4 V to 2.4 V for the 20 dB/V scale, and 0.25 V to 1.25 V for the 40 dB/V scale. Figure 35 shows the ideal gain curves when the FBK to OUT connection is shorted which are described by the following equations: G (20 dB/V ) = 20 x VGN - 19, VREF = 2.500 V G (30 dB/V ) = 30 x VGN - 19, VREF = 1.6666 V G (40 dB/V ) = 40 x VGN - 19, VREF = 1.250 V (3) (4) (5)
Usable gain control voltage ranges are 0.1 V to 2.9 V for 20 dB/V scale and 0.1 V to 1.45 V for the 40 dB/V scale. VGN voltages of less than 0.1 V are not used for gain-control since below 50 mV the channel is powered down. This can be used to conserve power and at the same time gate-off the signal. The supply current for a powered-down channel is 1.9 mA, the response time to power the device on-or-off, is less than 1 s.
Active Feedback Amplifier (Fixed Gain Amp)
To achieve single supply operation and a fully differential input to the DSX, an active-feedback amplifier (AFA) was utilized. The AFA is basically an op amp with two gm stages; one of the active stages is used in the feedback path (therefore the name), while the other is used as a differential input. Note that the differential input is an open-loop gm stage which requires that it be highly linear over the expected input signal range. In this design, the gm stage that senses the voltages on the attenuator is a distributed one, for example, there are as many gm stages as there are taps on the ladder network. Only a few of them are on at any one time, depending on the gain-control voltage. -9-
REV. A
AD605
The AFA makes a differential input structure possible since one of its inputs (G1) is fully differential; this input is made up of a distributed gm stage. The second input (G2) is used for feedback. The output of G1 will be some function of the voltages sensed on the attenuator taps which is applied to a high-gain amplifier (A0). Because of negative feedback, the differential input to the high-gain amplifier has to be zero, this in turn implies that the differential input voltage to G2 times gm2 (the transconductance of G2) has to be equal to the differential input voltage to G1 times gm1 (the transconductance of G1). Therefore the overall gain function of the AFA is
V OUT gm1 R1x R2 = x V ATTEN gm2 R2
VGN 0.1F 1 VGN1 2 -IN1 VIN 0.1F 3 +IN1 4 GND1 5 GND2 6 +IN2 7 -IN2 8 VGN2 VREF 16 2.500V OUT 0.1F
AD605
OUT1 15 FBK1 14 VPOS 13 +5V VPOS 12 FBK2 11 OUT2 10
VOCM 9 0.1F
(7)
Figure 36. Basic Connections for a Single Channel
where VOUT is the output voltage, VATTEN is the effective voltage sensed on the attenuator, (R1 + R2)/R2 = 42, and gm1/gm2 = 1.25; the overall gain is thus 52.5 (34.4 dB). The AFA has additional features: (1) inverting the output signal by switching the positive and negative input to the ladder network, (2) the possibility of using the -IN input as a second signal input, and (3) independent control of the DSX common-mode voltage. Under normal operating conditions it is best to just connect a decoupling capacitor to pin VOCM in which case the common-mode voltage of the DSX is half the supply voltage; this allows for maximum signal swing. Nevertheless, the commonmode voltage can be shifted up or down by directly applying a voltage to VOCM. It can also be used as another signal input, the only limitation being the rather low slew rate of the VOCM buffer. If the dc level of the output signal is not critical, another coupling capacitor is normally used at the output of the DSX; again this is done for level shifting and to eliminate any dc offsets contributed by the DSX (see AC Coupling section). The gain range of the DSX is programmable by a resistor connected between pins FBK and OUT. The possible ranges go from -14 dB to +34.4 dB when the pins are shorted together, to 0 dB to +48.4 dB when FBK is left open. Note that for the higher gain range, the bandwidth of the amplifier is reduced by a factor of five to about 8 MHz since the gain increased by 14 dB. This is the case for any constant gain-bandwidth-product amplifier of which the Active Feedback Amplifier is one.
APPLICATIONS
As shown here, the output is ac coupled for optimum performance. In the case of connecting to the 10-bit 40 MSPS A/D converter AD9050, ac coupling can be eliminated as long as pin VOCM is biased by the same 3.3 V common-mode voltage as the AD9050. Pin VREF requires a voltage of 1.25 V to 2.5 V, with between 40 dB/V and 20 dB/V gain scaling respectively. Voltage VGN controls the gain; its nominal operating range is from 0.25 V to 2.65 V for 20 dB/V gain scaling, and 0.125 V to 1.325 V for 40 dB/V scaling. When this pin is taken to ground, the channel will power down and disable its output.
Connecting Two Amplifiers to Double the Gain Range
Figure 37 shows the two channels of the AD605 connected in series to provide a total gain range of 96.8 dB. When R1 and R2 are shorts, the gain range will be from -28 dB to +68.8 dB with a slightly reduced bandwidth of about 30 MHz. The reduction in bandwidth is due to two identical low-pass circuits being connected in series; in the case of two identical single-pole lowpass filters, the bandwidth would be reduced by exactly 2. If R1 and R2 are replaced by open circuits, i.e., Pins FBK1 and FBK2 are left unconnected, then the gain range will shift up by 28 dB to 0 dB to +96.8 dB. As already pointed out earlier, the bandwidth of each individual channel will be reduced by a factor of 5 to about 8 MHz since the gain increased by 14 dB. In addition, there is still the 2 reduction because of the series connection of the two channels which results in a final bandwidth of the higher gain version of about 6 MHz.
VGN
C1 0.1F
1 VGN1 2 -IN1
VREF 16
2.500V R1
The most basic circuit in Figure 36 shows the connections for one channel of the AD605 with a gain range of -14 dB to +34.4 dB. The signal is applied at Pin 3. The ac coupling capacitors before pins -IN1 and +IN1 should be selected according to the required lower cutoff frequency. In this example the 0.1 F capacitors together with the 175 seen into each of the DSX input pins provides a -3 dB high pass corner of about 9.1 kHz. The upper cutoff frequency is determined by the amplifier and is 40 MHz.
VIN C2 0.1F C3 0.1F
AD605
OUT1 15 FBK1 14 VPOS 13 +5V VPOS 12 FBK2 11 R2 OUT2 10 C5 0.1F OUT C6 0.1F
3 +IN1 4 GND1 5 GND2 6 +IN2 7 -IN2 C4 0.1F 8 VGN2
VOCM 9
Figure 37. Doubling the Gain Range with Two Amplifiers
-10-
REV. A
AD605
Two other easy combinations are possible to provide a gain range of -14 dB to 82.8 dB: (1) make R1 a short and R2 an open, or (2) make R1 an open and R2 a short. The bandwidth for both of these cases will be dominated by the channel that is set to the higher gain and will be about 8 MHz. From a noise standpoint, choice (2) is the better one since by increasing the gain of the first amplifier, the second amplifier's noise will have less of an impact on the total output noise. One further observation regarding noise is that by increasing the gain the output noise will increase proportionally; therefore, there is no increase in signal-to-noise ratio. It will actually stay fixed. It should be noted that by selecting the appropriate values of R1 and R2, any gain range between -28 dB to +68.8 dB and 0 dB to +96.8 dB can be achieved with the circuit in Figure 37. When using any value other than shorts and opens for R1 and R2, the final value of the gain range will depend on external resistors matching on-chip resistors. Since the internal resistors can vary by as much as 20%, the actual values for a particular gain have to be determined empirically. Note that the two channels within one part will match quite well; therefore, R1 will track R2 in Figure 37. C3 is not required since the common-mode voltage at Pin OUT1 should be identical to the one at Pins +IN2 and -IN2, but since only 1 mV of offset at the output of the first DSX will introduce an offset of 53 mV when the second DSX is set to the maximum gain of the lowest gain range (+34.4 dB), and 263 mV when set to the maximum gain of the highest gain range (+48.4 dB), it is important to include ac coupling to get the maximum dynamic range at the output of the cascaded amplifiers. C5 is necessary if the output signal needs to be referenced to any common-mode level other than half of the supply as is provided by Pin OUT2. Figure 38 shows the gain verses VGN for the circuit in Figure 37 at 1 MHz and the lowest gain range (-14 dB to +34.4 dB). Note that the gain scaling is 40 dB/V, double the 20 dB/V of an individual DSX; this is the result of the parallel connection of the gain control inputs, VGN1 and VGN2. One could of course also sequentially increase the gain by first increasing the gain of Channel 1 and then Channel 2. In that case VGN1 and VGN2 will have to be driven from separate voltage sources, for instance two separate DACs. Figure 39 shows the gain error of Figure 38.
80 70 f = 1MHz 60 50 40 ACTUAL THEORECTICAL
GAIN - dB
30 20 10 0
-10 -20 -30 -40 0.1 0.5 0.9 1.3 1.7 VGN - Volts 2.1 2.5 2.9
Figure 38. Gain vs. VGN for the Circuit in Figure 37
4 f = 1MHz 3 2 GAIN ERROR - dB 1 0 -1 -2 -3 -4 0.2
0.7
1.2 1.7 VGN - Volts
2.2
2.7
Figure 39. Gain Error vs. VGN for the Circuit in Figure 37
REV. A
-11-
AD605
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Plastic DIP N-16
0.840 (21.33) 0.745 (18.93)
16 1 9 8
0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN
0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC
0.015 (0.381) 0.008 (0.204)
0.070 (1.77) SEATING 0.045 (1.15) PLANE
16-Pin Small Outline IC R-16
0.3937 (10.00) 0.3859 (9.80)
16 1 9 8
0.1574 (4.00) 0.1497 (5.80)
0.2550 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
x 45
SEATING PLANE
0.0500 (1.27) BSC
0.0192 (0.49) 0.0138 (0.35)
0.0099 (0.25) 0.0075 (0.19)
8 0 0.0500 (1.27) 0.0160 (0.41)
-12-
REV. A
PRINTED IN U.S.A.
C2188-9-10/96


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